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Document Reference No.: FT_000247
V2-EVAL Vinculum II Evaluation Board Datasheet Version 2.0
Clearance No.: FTDI#148
5.5
FIFO Interface Connector CN11
available in the VNC2 data sheet.
Figure 5.10
FIFO Connector CN11
Signal
name
Connector pin
32-PIN
VCN2 Pin No
48-PIN
64-PIN
IO type
Description
D0
D1
D2
D3
D4
D5
D6
D7
(29)
(29)
(29)
(29)
(29)
(29)
(29)
(29)
1
2
3
4
5
6
7
8
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15
16
17
18
19
20
22
23
IO
IO
IO
IO
IO
IO
IO
IO
FIFO data bit 0, bidirectional
FIFO data bit 1, bidirectional
FIFO data bit 2, bidirectional
FIFO data bit 3, bidirectional
FIFO data bit 4, bidirectional
FIFO data bit 5, bidirectional
FIFO data bit 6, bidirectional
FIFO data bit 7, bidirectional
RXF#
TXE#
RD#
WR#
OE#
3.3V (30)
GND
9
10
11
12
13
14
15
-
-
-
-
-
-
-
-
-
-
-
-
-
-
24
25
26
27
28
-
-
Output
Output
Input
Input
Input
-
-
FIFO receive full output
FIFO transmitter buffer empty
output
FIFO read enable input
FIFO write enable input
FIFO output enable –
synchronous FIFO only
3.3V power rail.
Ground pin
5V
(31)
16
-
-
-
-
5V power rail.
Notes:
(29) All VNC2?s IO pins can be driven from 3.3V LVTTL TTL logic levels.
The use of these pins for GPIO is set by the IOMUX on the VNC2 device. The pins are shared
by other connectors on the board. Care should be taken to ensure that pins are not driven
from other headers on the board.
(30) This pin is connected to 3.3V regulator output. External device can draw no more than 100mA
when board is powered from an external power supply and no more than 50mA when the
board is powered from USB bus.
(31) This pin is connected to the board?s 5V power rail. External device can draw no more than
250mA when board is powered from an external power supply and no more than 50mA when
the board is powered from USB bus.
Table 5.9
FIFO Interface Connector CN11
Copyright ? 2010 Future Technology Devices International Limited
22
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